In recent years, efforts to save power consumption of LSI have become active. Among the efforts is to lower operating voltage. However, it is impossible to significantly lower the operating voltage of MOS transistors used in typical circuits due to physical limits. Hence, for saving power consumption of LSI, there is a demand for developing low-voltage switching devices that are based on an operating principle different from that of typical MOS transistors.
One example is tunneling field-effect transistors utilizing quantum tunneling between bands of a semiconductor. These transistors utilize quantum tunneling as an operating principle different from that of MOS transistors. Quantum tunneling is a phenomenon in which even electrons having energy that would not let the electrons pass over a potential barrier pass through the barrier to the opposite side at some percentage. It is said that the tunneling field-effect transistors can be operated by controlling a tunneling current, which passes through an energy barrier called tunnel barrier, by a gate voltage, and that the tunneling field-effect transistors can be operated at a lower voltage than typical MOS transistors (see, e.g., NPL 1).
However, a tunnel resistance in the tunneling field-effect transistors that defines the current magnitude of a tunneling current passing through the tunnel barrier is high. Therefore, a current (ON-state current) of the tunneling field-effect transistors during an ON state is low, and the tunneling field-effect transistors cannot be operated at a high speed. Hence, there have been proposed some methods for increasing the ON-state current.
For example, there is proposed a method for providing extremely high impurity concentrations in a source region and a drain region and suppressing the thickness of these regions to enable a steep impurity profile to be formed and increase a tunneling current (see PTL 1). However, even this method has not been able to increase a tunneling current to a practical use level.
There is also proposed a method for using a stepped semiconductor substrate to increase the area of a region in which quantum tunneling is to occur, to thereby increase a tunneling current (see PTL 2). However, this method has problems that a high manufacturing cost is required and that an operation becomes slower due to an increased capacity of a gate capacitor attributed to the area enlargement.
There is also proposed a method for using a direct-transition compound semiconductor as a material for forming a semiconductor layer to increase a tunneling current (see NPL 2). However, this method requires a new plant investment because manufacturing according to this method cannot be carried out in many of the existing plants, leading to a problem that a manufacturing cost is high.
Hence, there is currently no satisfactory semiconductor element available that can be manufactured easily at a low cost, can obtain a high tunneling current, and has an excellent operating characteristic.
To increase a tunneling current is a common object among semiconductor elements other than tunneling field-effect transistors, such as resonant tunneling diodes utilizing quantum tunneling and Esaki diodes.